Lam Research and imec Expand 3D Integration and Aether Collaboration
Lam Research and imec expanded their collaboration with joint research on advanced 3D integration, next-generation 3D memory processes, and Aether dry resist for High-NA EUV lithography, according to TechNews. The 3D integration work covers dielectric deposition, stress compensation, bevel deposition, plasma dicing, and process validation, while the memory effort includes charge-trapping materials, multilayer deposition, high-aspect-ratio etching, contacts, and low-resistance interconnects. Lam Research said earlier joint work used single-exposure High-NA EUV lithography to pattern ruthenium direct-metal-etch interconnects at line pitches below 20 nanometers, with reported electrical yields of 100% for fork structures and above 90% for meander structures.
The collaboration targets manufacturing readiness for advanced packaging, 3D memory, and High-NA EUV processes that could support future AI compute chips, although the manufacturing and performance claims come mainly from the vendors.
人工智慧（AI）運算需求持續攀升，半導體產業的技術競爭已從電晶體微縮，進一步延伸至先進封裝、3D 整合及新世代微影技術。科林研發（Lam Research）宣布擴大與 imec 策略合作，新增先進 3D 整合技術及 Aether 乾式光阻兩大聯合研發項目，分別瞄準次世代封裝與記憶體製程，以及 High-NA EUV 微影技術，目標加速相關技術從研究階段邁向量產。
科林研發指出，3D 整合能將不同功能的晶片垂直堆疊或整合，提高系統效能、記憶體容量與頻寬，同時改善能源效率。在傳統電晶體微縮難度日益增加的情況下，先進封裝已成為延續半導體效能成長的重要途徑。不過，要讓異質整合架構進一步擴大應用，仍須克服材料、薄膜沉積、蝕刻及製程整合等多項挑戰。
#Lam Research#imec#Aether dry resist#Akara etch system#Striker ALD#High-NA EUV#GAA#CFET