Cadence推出Maestro芯片设计模型
Cadence推出Maestro专业AI模型组合,用于其芯片与系统设计智能体,首批模型计划于2026年第四季度向部分早期客户提供。客户可使用自有设计和工作流进行后训练,并部署在Cadence云、公有云或客户控制的本地环境。Cadence称初步结果较通用基础模型实现最高30%的成果品质提升和5倍Token效率,但未说明品质指标的测量方式。
Maestro将可后训练、可由客户控制的AI模型引入专业EDA工作流,但其宣称的效益仍需真实客户工作流验证。
Cadence, one of the largest electronic design automation (EDA) companies, has unveiled Maestro, its new portfolio of domain-specialized AI models tailored for its chip design agents, in a press release sent just ahead of earnings. In initial results compared with general-purpose AI models, Cadence claims up to a 30% improvement in the quality of results and that Maestro effectively uses fewer tokens for the same task, with up to 5x the token efficiency. The first models “are available to select early access customers” in Q4 2026, and customers may run them on Cadence’s cloud, public clouds, or customer-controlled on-premises environments and post-train them on their own “proprietary data, designs, and workflows.” To learn more about Maestro, we spoke with two Cadence executives: Rob Knoth, senior group director of strategy and new ventures, and Paul Cunningham, senior vice president and general manager.
This approach is distinct from Synopsys’ own specialized model, GPT-Synopsys, which will run on OpenAI-hosted infrastructure, without using customer data to train the model. The models of both EDA giants, announced less than a month apart, now split on where a customer’s design data goes. Where they might not differ is why: Paul Cunningham, senior vice president and general manager at Cadence, told Tom’s Hardware Premium that agent costs have “really started to explode,” adding, “And I think the world realized so.” That makes it a natural step, he said, to move more of the agents’ iterating “into the weights of the models themselves.”
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