Speaking at the 28th Korea Semiconductor Exhibition (SEDEX 2026) in Seoul, SK hynix head of development Ahn Hyun predicted that AI infrastructure performance scale will grow about 20-fold by 2030, according to Yonhap. He said the AI inference market is expanding along three axes at once — rising task complexity, surging context length and a flood of inference requests — inflating KV Cache capacity and forcing data to be spread across HBM, DRAM and SSD, with the resulting data movement becoming a new bottleneck for performance and power. Beyond tuning existing HBM, SK hynix is developing 3D-stacked DRAM that places DRAM directly atop logic chips such as GPUs and NPUs, and High Bandwidth Flash (HBF) that brings through-silicon-via stacking and high-speed I/O to NAND, targeting roughly 50% of same-generation HBM bandwidth with about 10x the capacity.

SK hynix·HBF·HBM·+5