HBF

Headlines · 3

1. 3d
   SK hynix forecasts ~20x AI infrastructure performance growth by 2030

   Speaking at the 28th Korea Semiconductor Exhibition (SEDEX 2026) in Seoul, SK hynix head of development Ahn Hyun predicted that AI infrastructure performance scale will grow about 20-fold by 2030, according to Yonhap. He said the AI inference market is expanding along three axes at once — rising task complexity, surging context length and a flood of inference requests — inflating KV Cache capacity and forcing data to be spread across HBM, DRAM and SSD, with the resulting data movement becoming a new bottleneck for performance and power. Beyond tuning existing HBM, SK hynix is developing 3D-stacked DRAM that places DRAM directly atop logic chips such as GPUs and NPUs, and High Bandwidth Flash (HBF) that brings through-silicon-via stacking and high-speed I/O to NAND, targeting roughly 50% of same-generation HBM bandwidth with about 10x the capacity.

   IT之家 AI · 🔥 0
2. 4d
   SK hynix unveils H-TPU, a tiny SSD controller core it says draws 2.5% of a CPU core's power

   SK hynix detailed an in-house processor architecture called the Hynix Transaction Processing Unit (H-TPU), presented by SoC design vice president Koo In-jae at the ISOCC 2026 conference in Songdo, Incheon on October 12. The company says H-TPU is not an AI tensor accelerator but a programmable processor for SSD data-plane and transaction control, using a simplified four-stage, in-order pipeline without superscalar or out-of-order units; it claims the core takes about 4% of a general-purpose CPU core's area and roughly 2.5% of its power. Instead of one monolithic CPU, SK hynix splits more than 100 repetitive functions — such as read/write command processing, metadata and buffer control — across dozens of small TPU clusters, activating only the modules a task needs while the traditional Arm CPU keeps management duties, per the reports. SK hynix plans to apply H-TPU across its NAND product lines, including next-generation enterprise SSD controllers, then in its next-generation AI storage architecture 'Storage Next', and expects synergies with its high bandwidth flash (HBF) due next year.

   IT之家 AI · 🔥 0
3. 5d
   Samsung develops zNAND-T and zNAND-I flash for AI workloads

   Korean outlet ZDNET Korea reports that Samsung Electronics is developing two NAND flash products tuned for AI workloads, zNAND-T and zNAND-I. zNAND-T stands for throughput, using TSV-stacked NAND dies to optimize read/write bandwidth for data-center AI silicon, an approach the report likens to the HBF concept proposed by SanDisk and SK hynix; zNAND-I refers to IOPS and targets random performance in scenarios with frequent small reads and writes, such as KV cache offloading. Separately, Samsung announced a next-generation memory and storage technology strategy for AI infrastructure spanning high-performance memory, Compute Express Link (CXL)-based storage expansion, and new-generation SSD data storage and management. Together with the previously disclosed zNAND-O, the three zNAND variants are positioned for different workloads, which the report frames as a shift from general-purpose NAND toward customization.

   IT之家 AI · 🔥 0

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