ASE
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- ASE launches PowerSiP 3D packaging for vertical VRM power delivery
ASE, the outsourced semiconductor assembly and test supplier, announced a 3D system-in-package solution built on its PowerSiP platform that vertically integrates the voltage regulator module (VRM) and shortens the current path. The company says the approach cuts parasitic wiring loss by more than half, citing advanced high-performance AI SoCs that exceed 1,000W and need peak currents above 1,000A at sub-1V voltages. The PowerSiP toolbox includes double-sided connected capacitors sandwiched between coreless substrates, capacitor array modules with exposed terminals, 4:1 high-aspect-ratio copper pillar integration, and single- or double-sided molded high-density active and passive component integration, aimed at fitting VRMs on the back side of PCBs in space-constrained compute trays.
IT之家 AI · 🔥 0 - TPCA Show 2026 spotlights energy-efficient AI, advanced packaging
Taiwan's Printed Circuit Association (TPCA) says its 27th TPCA Show, running Oct 20–22 at Nangang Exhibition Hall 1, will focus on "Energy-Efficient AI: From Computing to Systems and Applications," with more than 680 international brands, 1,840+ booths and a projected 70,000 professional buyers. The co-located 21st IMPACT-IAAC conference opens Oct 19 at the Grand Hilai Taipei and is expected to feature nearly 350 technical presentations and more than 1,500 industry and academic attendees, expanding for the first time to two Nangang halls. Sessions centre on AI computing and system integration, next-generation packaging and substrates (glass substrates, panel-level packaging, hybrid bonding, chiplets), and thermal management, reliability and smart manufacturing.
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