众星微

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1. Oct 21
   China's interconnect chips move center stage as AI clusters stall on data movement

   A 钛媒体 feature argues that chip supply is no longer the main constraint on AI compute: many data centers have GPUs and power but cannot keep clusters fully utilized, with China's CAICT cited as finding network communication accounts for 30% to 50% of time in large-scale distributed training. Huawei vice president Wang Lei is quoted from the 2026 China Internet Conference saying domestic token circulation efficiency is only 60%, with the rest lost to packet loss, latency jitter and data degradation, while 众星微 chief engineer Ning Zuolin estimates most clusters release no more than 50% of their compute. The piece also reports that 众星微 recently released three interconnect chips, including an AI NIC that integrates a PCIe Switch to cut board-level link length and latency, and it cites an estimate that interconnect chips make up roughly 8% to 9% of the value of supernode systems such as GB300 and VR200.

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