Developer adds an in-model RISC-V processor to Qwen3.5-4B
Developer Divyansh Agrawal says Qwenputer compiles a deterministic RV32IM processor into Qwen3.5-4B, using Gated DeltaNet state as memory to perform arithmetic and run C and MicroPython code during model forward passes. In developer-reported tests, Qwenputer scored 97.5% on large-integer multiplication, compared with 55% for the base model. IT之家 reports that the model is about 18.8GB and that some operations may take several seconds. Model weights and code are available on Hugging Face, ModelScope and GitHub.
I can't believe it's not silicon
Qwenputer is a pretty fun experimental model. It's a stock Qwen 3.5 4B with one addition: a RISC-V CPU embedded within the weights that uses the model's own Gated DeltaNet attention layers as RAM. (To learn how GDN works, here's a handy guide.) This 'CPU' runs completely within the forward passes of the model, and can run arithmetic operations, C and MicroPython code without any external runtime or tool usage whatsoever.
To be very clear, it is not a plugin, a tool or a sandbox. This blog will explain exactly how this model works, and how the model utilises GDN layers as RAM, and how I also slotted in an experimental in-model file storage.
I also wrote up two follow-ups built on top of Qwenputer: how hybrid models can learn to hide their reasoning in their RNN state and evade CoT monitoring, and how compiled weights like these can work as inbuilt monitoring tools that the model itself can't tamper with.
