CSET report: ping-based location checks beat site visits for tracking AI chips
A report from Georgetown's Center for Security and Emerging Technology (CSET) compares two ways of verifying where export-controlled AI chips actually are: on-site physical inspections and ping-based location verification (PLV), which measures signal round-trip time to trusted landmark servers. Across more than 10.5 million simulated scenarios, rented and self-built PLV posted higher detections-per-dollar in 86% and 92% of cases respectively, and physical inspections never came out ahead; against the median lower bound for inspections, rented and self-built PLV scored 7x/205x and 18x/172x. CSET concludes the most effective setup is PLV as the backbone with a small number of physical checks, though PLV only flags problems after a chip has moved and can be disrupted by network outages or location spoofing.
If PLV's cost advantage holds up, AI chip export-control enforcement could shift from spot checks toward continuous location monitoring.
导语美国乔治敦大学安全与新兴技术中心（CSET）近期发布报告，聚焦美国如何通过技术手段追踪AI芯片的实际位置，以加强出口管制、发现芯片走私。研究比较了实地检查、视频检查、地理定位等多种方案，认为基于网络信号验证位置（PLV）并辅以少量实地检查较为可行。但这类系统只能在芯片转移后发现异常，无法完全防止走私，也可......
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导语
美国乔治敦大学安全与新兴技术中心（CSET）近期发布报告，聚焦美国如何通过技术手段追踪AI芯片的实际位置，以加强出口管制、发现芯片走私。研究比较了实地检查、视频检查、地理定位等多种方案，认为基于网络信号验证位置（PLV）并辅以少量实地检查较为可行。但这类系统只能在芯片转移后发现异常，无法完全防止走私，也可能受断网、位置伪造等因素干扰。报告把成本纳入考虑，指出实地检查执行次数越多，成本越高；而PLV模式则是先铺一张网，随后规模越大，成本摊得越薄。文章强调，技术监测须与监管部门的调查能力和执法资源相配套。